1. Field of the Invention
The present invention relates to a method of forming an interconnection line of a semiconductor integrated circuit and, more particularly, to a method of forming an interconnection line in which a contact hole is substantially filled with a conductive material to thereby improve the resistance and reliability of the interconnection line.
2. Discussion of Related Art
Thin films formed with aluminum and aluminum alloys are widely utilized as an interconnection material for a semiconductor circuit because they have an electrical property of high conductivity, an easy pattern formation by dry etching, a good adhesion to a silicon oxide film, and an inexpensive cost.
Recently, the integration of an integrated circuit has increased with greater applicability. As a result, the size of the semiconductor device has decreased, the interconnection pattern has become finer and multilayered, the layer steps in the device have increased, and the aspect ratio of a contact hole or via hole has increased. Thus, it has become more important to form an interconnection line near the step coverage where severe steps, contact holes and via holes are present.
If an interconnection line is formed by sputtering, which is a conventional method of forming a metal interconnection line, the thickness of the interconnection layer decreases locally with steps or unevenness due to a shadow effect. The shadow effect is severe in contact holes having the aspect ratio above 1.
A chemical vapor deposition method is used instead of sputtering to achieve a more uniform thickness. Investigation has been conducted to improve the step coverage by forming a tungsten film using a low pressure chemical vapor deposition method. However, in this method it is difficult to adopt the tungsten interconnection line as an interconnection line because it has resistivity above two times that of the aluminum interconnection line. Therefore, a method of effectively forming a plug in the contact hole is still needed and many methods to achieve the same have been proposed.
Among the proposed methods, a selective CVD method is known where a tungsten film is grown selectively through an exposed substrate in the contact hole using a selective chemical vapor deposition (CVD) method, thereby forming a plug. Another method forms a barrier metal layer or a glue layer on the bottom and sidewalls of the contact hole, and then deposits and etches back the blanket tungsten film above the deposition thickness, thereby forming the plug.
In the selective CVD method, however, it is difficult to suppress the growth of the tungsten film on the insulating film. Thus, a collimator for passing only the vertically moving ions is need. In the blanket deposition and etch-back method, it is necessary to form in the contact hole a reliable barrier metal layer or glue layer with high aspect ratio. To achieve this the thickness of the barrier layer or glue layer must be above the minimum thickness to nucleate tungsten on the bottom and sidewalls of the contact hole using the CVD method.
Meanwhile, the surface level of the contact hole differs from that of the plug because the depth of the contact hole varies with the degree of planarization of the insulating layer. For example, the surface level of the plug may be lower than that of the contact hole. Further, in the aluminum reflow process where the contact hole is filled with a sputtered and annealed aluminum or an aluminum sputtered at a high temperature, aluminum flows into the contact hole due to its high mobility caused by rasing the substrate temperature to 500.degree. C. In that case, Ti, TiN or the composite layer of Ti and TiN is used as an underlying layer prior to the aluminum deposition. But if the step coverage and the surface state of the underlying layer are poor, disconnection occurs on the sidewall of the contact hole and a void is formed in the contact hole.
In order to avoid such problems and to improve the step coverage in the contact hole, a conductive layer with low resistance such as aluminum, copper and silver, is deposited using a chemical vapor deposition (CVD) method. Aluminum may be deposited by DMAH or DMEAA (CH.sub.3).sub.2 (CH.sub.3 CH.sub.2)N!AlH.sub.3 source, whereas copper may be deposited by (hfac)Cu(TMVS) hexafluroacetylacetonate Cu trimethylvinylsilane! source. However, in the case of fabricating a conductive line with the fine line width below 0.5 .mu.m, the reflectance and conductivity of the conducive line deteriorates and a uniform integrity is difficult to maintain, because the CVD films have a high degree of roughness. Accordingly, electromigration (EM) occurs and the reliability of the device formed by such methods is inadequate.
FIGS. 1A to 1D are partial cross-sectional views for illustrating a conventional method where a conductive line is formed after the formation of a tungsten plug.
As shown in FIG. 1A, an insulating layer 12 is formed on a substrate 11 and a lower interconnection line 13 is formed thereon. After an insulating layer 14 covers the entire surface of the formed structure, a via-hole or contact hole 15 is formed above the lower interconnection line 13.
As shown in FIGS. 1B and 1C, a conductive material layer 16 is formed and etched back, thereby forming a plug 17 consisting of the conductive material in the hole 15. Then, as shown in FIG. 1D, a conductive material layer is formed on the entire surface and patterned to form an upper interconnection line 18.
However, in the conventional method and structure, the conductive material layer 16 is over-etched as the etch-back is performed to form the plug. As a result, portions of the steps of the insulating layer 14 are exposed and the surface level of the plug is lower than that of the via hole. Further, a recess is formed within the contact hole or interconnection line 18.
FIGS. 2A and 2B are partial cross-sectional views for illustrating another conventional method where a plug and a CVD film are formed with a same material at the same time. Here, the CVD film, e.g., aluminum, functions as a conductive line and fills the contact hole.
As shown in FIG. 2A, an insulating layer 22 is formed on a substrate 21 and a lower interconnection line 23 is formed thereon. After an insulating layer 24 covers the entire surface of the resultant, a via-hole 25 is formed above the lower interconnection line 23.
As shown in FIG. 2B, a conductive material layer 26 is deposited over the insulating layer 24 and patterned to form an upper interconnection line.
In this method, the process of forming the upper interconnection line can be simplified because the via-hole is also filled by the deposition. However, the reliability of the device deteriorates because the upper interconnection line has a rough surface.
As described above, the conventional method for forming an interconnection line has the following problems.
If a plug is formed using a selective tungsten deposition method or a blanket deposition and etch-back method, the depth of the contact hole is varied with the degree of planarization of the insulating layer. Therefore the surface level of the contact hole is substantially different from that of the plug. In general, this results in the plug having a top surface level which is lower than the surface level of the contact hole because the conductor material is over-etched during the etch-back process. Consequently, poor step coverage of the conductive line is obtained.
On the other hand, if the plug and the CVD (aluminum) film are formed at the same time, the reliability of the interconnection line deteriorates because the aluminum layer contains a rough surface.